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pa ckage schematic 4/29/04 p age 1 of 12 ?2004 fairchild semiconductor corporation high speed transistor optocouplers HCPL4503M description the HCPL4503M optocoupler consists of an algaas led optically coupled to a high speed photodetector transistor. a separate connection for the bias of the photodiode improves the speed by several orders of magnitude over conventional phototransistor optocouplers by reducing the base-collector capacitance of the input transistor. the base of the phototransisto r is not bonded out to a pin for improved noise immunity. an internal noise shield provides superior common mode rejection of 15kv/? minimum. features viso = 5kv rms is standard for all devices high speed-1 mbit/s superior cmr, cm h = 50 kv/ms (typical); cm l = 30 kv/ms (typical) no base connection for improved noise immunity ctr guaranteed 0-70? ? .l. recognized (file # e90700, vol 2) vde approval pending applications line receivers pulse transformer replacement output interface to cmos-lsttl-ttl wide bandwidth analog coupling 8 8 1 8 1 1 1 2 3 4 5 6 7 8 + _ v f v cc n/c v o gnd n/c n/c
4/29/04 p age 2 of 12 ?2004 fairchild semiconductor corporation high speed transistor optocouplers HCPL4503M absolute maximum ratings (t a = 25? unless otherwise speci?d) p arameter symbol value units storage temperature t stg -40 to +125 ? operating temperature t opr -40 to +100 ? lead solder temperature t sol 260 for 10 sec ? emitter dc/average forward input current i f (avg) 25 ma p eak forward input current (50% duty cycle, 1 ms p.w.) i f (pk) 50 ma p eak transient input current - ( 1 ? p.w., 300 pps) i f (trans) 1.0 a reverse input voltage v r 5v input power dissipation p d 100 mw detector av erage output current i o (avg) 8 ma p eak output current i o (pk) 16 ma supply voltage v cc -0.5 to 30 v output voltage v o -0.5 to 20 v output power dissipation p d 100 mw
4/29/04 p age 3 of 12 ?2004 fairchild semiconductor corporation high speed transistor optocouplers HCPL4503M ** all typicals at t a = 25? electrical characteristics (t a = 0 to 70? unless otherwise speci?d) individual component characteristics p arameter test conditions symbol min typ** max unit emitter (i f = 16 ma, t a =25?) v f 1.45 1.7 v input forward voltage (i f = 16 ma) 1.8 input reverse breakdown voltage (i r = 10 ?) b vr 5.0 v t emperature coef?ient of f orward voltage (i f = 16 ma) ( ? v f / ? t a ) -1.6 mv/? detector logic high output current (i f = 0 ma, v o = v cc = 5.5 v) (t a =25?) i oh 0.001 0.5 ? (i f = 0 ma, v o = v cc = 15 v) (t a =25?) 0.005 1 (i f = 0 ma, v o = v cc = 15 v) 50 logic low supply current (i f = 16 ma, v o = open) (v cc = 15 v) i ccl 120 200 ? logic high supply current (i f = 0 ma, v o = open, v cc = 15 v) (t a =25?) i cch 1 ? (i f = 0 ma, v o = open) (v cc = 15 v) 2
4/29/04 p age 4 of 12 ?2004 fairchild semiconductor corporation high speed transistor optocouplers HCPL4503M ** all typicals at t a = 25? ** all typicals at t a = 25? transfer characteristics (t a = 0 to 70? unless otherwise speci?d) p arameter test conditions symbol min typ** max unit coupled (i f = 16 ma, v o = 0.4 v) (note 1) (v cc = 4.5 v, t a =25?) ctr 19 27 50 % current transfer ratio (note 5) (i f = 16 ma, v cc = 4.5 v, v ol =0.5v) 15 30 logic low output voltage output voltage (i f = 16 ma, i o = 3 ma) (v cc = 4.5 v, t a =25?) v ol 0.5 v (i f = 16 ma, i o = 2.4 ma) (v cc = 4.5 v) 0.5 switching characteristics (t a = 0 to 70? unless otherwise speci?d., v cc = 5 v) p arameter test conditions symbol min typ** max unit propagation delay time to logic low (r l = 1.9 k ? , i f = 16 ma) (note 2) (fig. 7) t a = 25? t phl 0.45 0.8 ? (r l = 1.9 k ? , i f = 16 ma) (note 2) (fig. 7) 1.0 ? propagation delay time to logic high (r l = 1.9 k ? , i f = 16 ma) (note 2) (fig. 7) t a = 25? t plh 0.3 0.8 ? (r l = 1.9 k ? , i f = 16 ma) (note 2) (fig. 7) 1.0 ? common mode transient immunity at logic high (i f = 0 ma, v cm = 1,500 v p-p ) t a = 25?, (r l = 1.9 k ? ) (note 3) (fig. 8) |cm h | 15,000 50,000 v/? common mode transient immunity at logic low (i f = 16 ma, v cm = 1,500 v p-p ) (r l = 1.9 k ? ) (note 3) (fig. 8) |cm l | 15,000 30,000 v/?
4/29/04 p age 5 of 12 ?2004 fairchild semiconductor corporation high speed transistor optocouplers HCPL4503M notes 1. current transfer ratio is de?ed as a ratio of output collector current, i o , to the forward led input current, i f , times 100%. 2. the 1.9 k ? load represents 1 ttl unit load of 1.6 ma and 5.6 k ? pull-up resistor. 3. common mode transient immunity in logic high level is the maximum tolerable (positive) dv cm /dt on the leading edge of the common mode pulse signal v cm , to assure that the output will remain in a logic high state (i.e., v o >2.0 v). common mode transient immunity in logic low level is the maximum tolerable (negative) dv cm /dt on the trailing edge of the common mode pulse signal, v cm , to assure that the output will remain in a logic low state (i.e., v o <0.8 v). 4. device is considered a two terminal device: pins 1, 2, 3 and 4 are shorted together and pins 5, 6, 7 and 8 are shorted together. isolation characteristics (t a = 0 to 70? unless otherwise speci?d) characteristics test conditions symbol min typ** max unit input-output insulation leakage current (relative humidity = 45%) (t a = 25?, t = 5 s) (v i-o = 3000 vdc) (note 4) i i-o 1.0 ? withstand insulation test voltage (rh 50%, t a = 25?) (note 4) ( t = 1 min.) v iso 5,000 v rms resistance (input to output) (note 9) (v i-o = 500 vdc) r i-o 10 12 ? capacitance (input to output) (note 4) (f = 1 mhz) c i-o 0.6 pf
4/29/04 p age 6 of 12 ?2004 fairchild semiconductor corporation high speed transistor optocouplers HCPL4503M fig. 1 normalized ctr vs. forward current i f - forward current (ma) 0.1 1 10 100 normalized ctr 0.0 0.2 0.4 0.6 0.8 1.0 1.2 fig. 2 normalized ctr vs. temperature t a - temperature ( c) -60 -40 -20 0 20 40 60 80 100 normalized ctr 0.0 0.2 0.4 0.6 0.8 1.0 1.2 fig. 3 output current vs. output voltage v o - output voltage (v) 02468101214161820 i o - output current (ma) 0 2 4 6 8 10 12 14 16 i f = 5 ma i f = 10 ma i f = 15 ma i f = 20 ma i f = 25 ma i f = 30 ma i f = 35 ma i f = 40 ma normalized to: i f = 16 ma v o = 0.4 v v cc = 5 v t a = 25 c normalized to: t a = 25 c i f = 16ma v cc = 5 v v o = 0.4 v fig. 4 logic high output current vs. temperature t a - temperature ( c) -60 -40 -20 0 20 40 60 80 100 i oh - logic high output current (na) 0.1 1 10 100 1000 fig. 5 propagation delay vs. temperature t a - temperature ( c) -60 -40 -20 0 20 40 60 80 100 t p - propagation delay (ns) 0 100 200 300 400 500 600 700 800 r l = 1.9 k (tphl) r = 4.1 k (tplh) l r l = 1.9 k (tplh) r l = 4.1 k (tplh) fig. 6 propagation delay vs. load resistance r l = load resistance (k ? ) 1 10 t p - propagation delay (ns) 100 1000 10000 i f - 16 ma (tphl) i f - 10 ma (tphl) i f - 10 ma (tplh) i f - 16 ma (tplh) t a = 25 c v cc = 5 v i f = 0 ma v cc = 5 v v o = 5 v i f = 16 ma v cc = 5 v v cc = 5 v t a = 25 c
4/29/04 p age 7 of 12 ?2004 fairchild semiconductor corporation high speed transistor optocouplers HCPL4503M pulse gen cm v v ff b a +- +5 v o v - i f 3 4 + f v - 2 1 shie ld noise 6 o 5 gnd 7 8 v n/c cc v l r plh ol v v o 0 5 v 1.5 v f i 1.5 v t phl t sw itch at a : i = 0 ma f sw itch at a : i = 16 ma f t r v o o v ol v 5 v 0 v 10% 10% 90% cm v 10 v 3 i monitor f 4 i/f < 100 s 10% d.c. tr = 5ns generator pulse z = 50 o + v f i ? f - 2 1 shie ld noise v o o 6 5 gnd 7 8 v n/c l r cc v +5 v 0.1 f l c = 1.5 f 0.1 f f t m r 90% fig. 8 common mode immunity test circuit fig. 7 switching time test circuit
4/29/04 p age 8 of 12 ?2004 fairchild semiconductor corporation high speed transistor optocouplers HCPL4503M pa ck ag e dimensions (through hole) 0.200 (5.08) 0.140 (3.55) 0.100 (2.54) typ 0.022 (0.56) 0.016 (0.41) 0.020 (0.51) min 0.390 (9.91) 0.370 (9.40) 0.270 (6.86) 0.250 (6.35) 3 0.070 (1.78) 0.045 (1.14) 2 41 56 7 8 0.300 (7.62) typ 0.154 (3.90) 0.120 (3.05) 0.016 (0.40) 0.008 (0.20) 15?max pin 1 id. seating plane pa ck ag e dimensions (surface mount) lead coplanarity : 0.004 (0.10) max 0.270 (6.86) 0.250 (6.35) 0.390 (9.91) 0.370 (9.40) 0.022 (0.56) 0.016 (0.41) 0.100 (2.54) typ 0.020 (0.51) min 0.070 (1.78) 0.045 (1.14) 0.300 (7.62) typ 0.405 (10.30) min 0.315 (8.00) min 0.045 [1.14] 32 1 4 567 8 0.016 (0.41) 0.008 (0.20) pin 1 id. pa ck ag e dimensions (0.4"lead spacing) 0.200 (5.08) 0.140 (3.55) 0.100 (2.54) typ 0.022 (0.56) 0.016 (0.41) 0.004 (0.10) min 0.390 (9.91) 0.370 (9.40) 0.270 (6.86) 0.250 (6.35) 3 0.070 (1.78) 0.045 (1.14) 2 41 56 7 8 0.400 (10.16) typ 0.154 (3.90) 0.120 (3.05) 0.016 (0.40) 0.008 (0.20) 0?to 15 pin 1 id. seating plane 8 - pin dip 0.070 (1.78) 0.060 (1.52) 0.030 (0.76) 0.100 (2.54) 0.295 (7.49) 0.415 (10.54) note all dimensions are in inches (millimeters)
4/29/04 p age 9 of 12 ?2004 fairchild semiconductor corporation high speed transistor optocouplers HCPL4503M ordering information marking information option example part number description s hcpl4503sm surface mount lead bend sd hcpl4503sdm surface mount; tape and reel (1,000 units per reel) t hcpl4503tm 0.4" lead spacing v hcpl4503vm vde0884 (approval pending) tv hcpl4503tvm vde0884 (approval pending); 0.4 lead spacing sv hcpl4503svm vde0884 (approval pending); surface mount sdv hcpl4503sdvm vde0884 (approval pending); surface mount; tape and reel (1,000 units per reel) 1 2 6 4 3 5 de?itions 1f airchild logo 2d e vice number 3 vde mark (note: only appears on parts ordered with vde option ?see order entry table) 4t wo digit year code, e.g., ?3 5t wo digit work week ranging from ?1 to ?3 6 assembly package code 4503 tb yy xx v
4/29/04 p age 10 of 12 ?2004 fairchild semiconductor corporation high speed transistor optocouplers HCPL4503M carrier tape speci?ations description symbol dimension in mm t ape width w 16.0 ?0.3 t ape thickness t 0.30 ?0.05 sprocket hole pitch p 0 4.0 ?0.1 sprocket hole diameter d 0 1.55 ?0.05 sprocket hole location e 1.75 ?0.10 po ck et location f 7.5 ?0.1 p 2 4.0 ?0.1 po ck et pitch p 12.0 ?0.1 po ck et dimensions a 0 10.30 ?.20 b 0 10.30 ?.20 k 0 4.90 ?.20 cover tape width w 1 1.6 ?0.1 cover tape thickness d 0.1 max max. component rotation or tilt 10 min. bending radius r 30 d 0 p t 2 d 0 1 1 w user direction of feed 0 k b 0 a 0 w e d f p p
4/29/04 p age 11 of 12 ?2004 fairchild semiconductor corporation high speed transistor optocouplers HCPL4503M re?w pro?e ? peak reflow temperature: 260 c (package surface temperature) ? time of temperature higher than 183 c for 160 seconds or less ? one time soldering reflow is recommended 245 c, 10?0 s ti me (minute) 0 300 250 200 150 100 50 0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 temperature (?) time above 183 c, <160 sec ramp up = 2?0 c/sec 260 c peak
life support policy fairchild? products are not authorized for use as critical components in life support devices or systems without the express written approval of the president of fairchild semiconductor corporation. as used herein: 1. life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury of the user. 2. a critical component in any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. disclaimer fairchild semiconductor reserves the right to make changes without further notice to any products herein to improve reliability, function or design. fairchild does not assume any liability arising out of the application or use of any product or circuit described herein; neither does it convey any license under its patent rights, nor the rights of others. 4/29/04 p age 12 of 12 ?2004 fairchild semiconductor corporation high speed transistor optocouplers HCPL4503M

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